TMC2225 DATASHEET (Rev. 1.15 / 2023-FEB-16)
8
2 Pin Assignments
The TMC2225 family comes in a thermally optimized HTSSOP package.
2.1 Package Outline TMC2225
CPO
CPI
VCP
VS
OA2
BRA
OA1
OB1
BRB
OB2
VS
VREF
TEST
GND
TMC2225
HTSSOP28
© B. Dwersteg,
TRINAMIC
Pad=GND
GND
INDEX
MS2
MS1
CLK
-
STEP
ENN
DIR
SPREAD
DIAG
PDN_UART
VCC_IO
5VOUT
Figure 2.1 TMC2225 Pinning Top View – type: HTSSOP28, 9.7x6.4mm² over pins, 0.65mm pitch
2.2 Signal Descriptions TMC2225
Pin
CPO
CPI
VCP
VS
OA2
BRA
OA1
OB1
BRB
OB2
VREF
TEST
GND
5VOUT
Number
1
2
3
Type
4, 11
5
6
7
8
9
10
12
AI
13
14, 28
15
VCC_IO 16
PDN_UART 17
DIO
(pd)
Function
Charge pump capacitor output.
Charge pump capacitor input. Tie to CPO using 22nF 50V capacitor.
Charge pump voltage. Tie to VS using 100nF capacitor.
Motor supply voltage. Provide filtering capacity near pin with
shortest possible loop to GND pad.
Motor coil A output 2
Sense resistor connection for coil A. Place sense resistor to GND near
pin. Tie to GND when using internal sense resistor.
Motor coil A output 1
Motor coil B output 1
Sense resistor connection for coil B. Place sense resistor to GND near
pin. Tie to GND when using internal sense resistor.
Motor coil B output 2
Analog reference voltage for current scaling or reference current for
use of internal sense resistors (optional mode)
Connect to GND. May alternatively be left open or connected to VREF.
GND. Connect to GND plane near pin.
Output of internal 5V regulator. Attach 2.2µF to 4.7µF ceramic
capacitor to GND near to pin for best performance. Provide the
shortest possible loop to the GND pad.
3.3V to 5V IO supply voltage for all digital pins (does not power
logic block).
Power down not control input (low = automatic standstill current
reduction). (internal pull-down resistor)
Optional UART Input/Output. Power down function can be disabled
in UART mode.
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