58 VICSION VS500
If F5.0 is set as #1##, the PLC state will keep fix. But external terminals will force reset, which is set by this function.
F3.6
F3.7
F3.8
Output terminal OC1
Output terminal OC2
TA, TB and TC of relay contacts
Setting range：0 ~ 18
Setting range：0 ~ 18
Setting range：0 ~ 18
It defines expression content of relay contact and terminals OC1 and OC 2 when collector is open-circuit. Shown as
fig.6-13.
When TA is on with TC, setting functions will available
D
R
1
While connecting the externa inductance cell (For example,
Relaycoil), it must connect the parallel fly-wheel diode D
2
Fig.6-13 Inner wiring diagram of output terminals
0：In the running
When the inverter is in the running state, it will output the valid signal. While the inverter is in stop mode, it will
output the invalid signal.
1：Frequency reaching
When the output frequency of inverter approaches the certain range of the setting frequency. (The range is decided by
parameter F3.9), it outputs valid signal, otherwise, outputs the invalid signal (High-resistance).
OC
H i g h re s ista nce
f
Se t tin g freq
Ou tpu t freq
[F3.9]
Outpu t freq
t
Fig.6-14 Freq. reaching signal
2：Freq. level detection signal（FDT）
When the output frequency of inverter is over FDT Frequency level, the inverter will output the valid signal (Low
electrical level) after the setting delay time. When the output frequency of inverter is lower than FDT frequency level,
after the same delay time, it will output the invalid signal (High resistance).
OC1
High resistanc
High resistanc
f
[F3.10]
[F3.12]
Setting frequency
FDT Level
[F3.11]
[F3.11]
t
[F3.13]
[F3.13]
Fig. 6-15 Freq. level detection signal（FDT）
VS500 series of general purpose inverter Duxe.ru
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