GigE Area Scan Camera User Manual

The relation among external voltage, resistance and the output level low is shown below.

Table 11-5 Parameters of Output Logic Level Low

External Voltage External Resistance

VL (GPIO2)

3.3 VDC

1 KΩ

160 mV

5 VDC

1 KΩ

220 mV

12 VDC

1 KΩ

460 mV

24 VDC

1 KΩ

860 mV

30 VDC

1 KΩ

970 mV

When the voltage of external resistance (1 KΩ) is pulled up to 5 VDC, the logic level and

electrical feature of configuring Line 2 as output are shown below.

Internal

Logic

Logic 1

Output Level

TDR TR

TDF TF

Logic 0

Output Level

Figure 11-7 Output Logic Level

Table 11-6 Output Electrical Feature

Parameter Name

Parameter Symbol

Value

Output Logic Level Low

VL

220 mV

Output Logic Level High

VH

4.75 VDC

Output Rising Time

TR

0.06 μs

Output Falling Time

TF

0.016 μs

Output Rising Delay

TDR

0 μs to 4 μs

Output Falling Delay

TDF

< 1 μs

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